This invention relates to a semiconductor memory device, to a method of manufacturing a semiconductor memory device, and to a technique for effectively applying the device and method to a semiconductor memory device comprising a SRAM (Static Random Access Memory) in which a memory cell is formed from four MISFETs.
An SRAM (Static Random Access Memory), which is a type of general-purpose mass semiconductor memory device, may comprise four n channel type MISFETs (Metal Insulator Field Effect Transistors) and two p channel type MISFETs for example. However, in a “perfect CMOS” (Complementary Metal Oxide Semiconductor) SRAM, which is of the same type, six MISFETs are arranged in a principal surface of a semiconductor substrate, so that reduction of the memory cell size is difficult.